Fuzzy-based mapping algorithms to design networks-on-chip

Abstract

Network on Chip (NoC) has been suggested as an appropriate and scalable solution for System on Chip (SoC) architectures having high communication demands. In this study, we propose heuristic fuzzy based mapping approaches to decrease the power consumption and improve the performance in the NoCs. The proposed method has two steps: core to task mapping and router reduction. In the mapping stage, two algorithms are proposed; first, proposed mapping algorithm maps the tasks to cores heuristically by means of Genetic and Simulated annealing algorithms, then tries to define a cost for each mapping and choose the lowest cost in order to diminish the power dissipation in the NoCs. In the second mapping algorithm, fuzzy rules are applied to evaluate and select the best topology such that the power consumption is minimized. Fuzzy logic is used to make a better decision in terms of distance and bandwidth for tasks to cores mapping. In the second phase, since the optimum number of router resources has colossal effect on power dissipation in the NoCs, fuzzy approach is utilized to reduce the number of routers in the NoC architectures without any significant impact on the performance. To evaluate the proposed methods, we use five multimedia benchmarks. The experimental results show that heuristic and fuzzy logic methods improve the power consumption over the non-optimized NoC by up to 66% and 73%, respectively. Also, the proposed fuzzy mapping algorithm along with the router reduction method compared to the presented fuzzy without router reduction approach gives on an average, 73% energy reduction.