Highly linear transconductance topology using floating transistors

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dc.contributor.authorZare-Hoseini, H
dc.contributor.authorKale, I
dc.contributor.authorMorling, CS
dc.date.accessioned2026-02-06T18:43:42Z
dc.date.issued2006
dc.departmentDoğu Akdeniz Üniversitesi
dc.description.abstractA new technique for realising highly linear transconductances is presented. The technique is based on using floating transistors ill the input stage of the transconductor, which act as source-followers along with a degeneration resistor. An example realisation of the technique is given together with circuit-level simulations.
dc.identifier.doi10.1049/el:20063846
dc.identifier.endpage4
dc.identifier.issn0013-5194
dc.identifier.issn1350-911X
dc.identifier.issue1
dc.identifier.scopus2-s2.0-30344436656
dc.identifier.scopusqualityQ3
dc.identifier.startpage2
dc.identifier.urihttps://doi.org/10.1049/el:20063846
dc.identifier.urihttps://hdl.handle.net/11129/13733
dc.identifier.volume42
dc.identifier.wosWOS:000235322600002
dc.identifier.wosqualityQ4
dc.indekslendigikaynakWeb of Science
dc.indekslendigikaynakScopus
dc.language.isoen
dc.publisherWiley
dc.relation.ispartofElectronics Letters
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı
dc.rightsinfo:eu-repo/semantics/closedAccess
dc.snmzKA_WoS_20260204
dc.titleHighly linear transconductance topology using floating transistors
dc.typeArticle

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