Hardware-Oriented Algorithm for Quaternion-Valued Matrix Decomposition
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Publisher
IEEE-Inst Electrical Electronics Engineers Inc
Access Rights
info:eu-repo/semantics/closedAccess
Abstract
In this brief, a generalized form for 2-, 4-, and 8-D coordinate rotation digital computer (CORDIC) rotation matrices is suggested, and a novel highly parallel efficient hardware-oriented 8-D octonion CORDIC algorithm for quaternion-valued matrix decomposition is designed and presented. Furthermore, a successful sequence of iterations with guaranteed convergence is determined, and the hardware implementation of this algorithm is considered. Such a processor can be utilized to speed up the Givens rotations and computing the QR and singular-value decomposition processes of a quaternion matrix in a digital signal processor.
Description
Keywords
Givens rotations, processor arrays, QR decomposition and singular-value decomposition (SVD), quaternion matrix
Journal or Series
Ieee Transactions on Circuits and Systems Ii-Express Briefs
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Volume
58
Issue
4










