A compact three-stage low-voltage low-power BiCMOS operational amplifier with inverted nested Miller compensation

Abstract

This paper presents a three-stage, compact, and power-efficient 3 V BiCMOS operational amplifier (opamp) with rail-to-rail input and output stages. The opamp is designed to be loaded by a 20-pF capacitive load and the unity-gain bandwidth is 5.2 MHz at 62 degrees phase margin. The bipolar output stage is designed to swing an output load current of -12 to 12 mA. The opamp have an open-loop voltage gain of 122 dB and a bandwidth -to-supply power ratio of 6.42 MHz/mW for the 20 pF capacitive load.