Influence of DC Link Capacitor Ageing on Performance of Single-Phase Power Factor Correction Rectifiers
| dc.contributor.author | Kolesnik, Sergei | |
| dc.contributor.author | Komurcugil, Hasan | |
| dc.contributor.author | Kuperman, Alon | |
| dc.date.accessioned | 2026-02-06T17:58:29Z | |
| dc.date.issued | 2023 | |
| dc.department | Doğu Akdeniz Üniversitesi | |
| dc.description | 14th IEEE International Symposium on Diagnostics for Electrical Machines, Power Electronics and Drives, SDEMPED 2023 -- 2023-08-28 through 2023-08-31 -- Chania -- 193324 | |
| dc.description.abstract | Coefficients of PI controller, typically employed as DC link voltage loop compensator of power factor correction rectifiers (PFCR) depend on DC link voltage reference, grid voltage magnitude, grid frequency and DC link capacitance so that desired values of grid-side current total harmonic distortion (THD) and DC-link voltage loop phase margin (PM) are attained. On the other hand, it is well-recognized that DC link capacitor ageing leads to reduction of corresponding capacitance value. Consequently, this paper investigates the influence of the latter on the above-mentioned performance merits as well as on the crossover frequency of DC link voltage loop and steady-state DC link voltage ripple. Frequency-domain and time-domain simulations are provided to successfully verify the derived analytical expressions. © 2023 IEEE. | |
| dc.description.sponsorship | IEEE Industrial Electronics Society (IES); IEEE Industry Applications Society (IAS); IEEE Power Electronics Society (PELS); Megger Group Limited; Technical University of Chania (TUC) Region of Crete | |
| dc.identifier.doi | 10.1109/SDEMPED54949.2023.10271492 | |
| dc.identifier.endpage | 605 | |
| dc.identifier.isbn | 9798350320770 | |
| dc.identifier.scopus | 2-s2.0-85175245831 | |
| dc.identifier.scopusquality | N/A | |
| dc.identifier.startpage | 601 | |
| dc.identifier.uri | https://doi.org/10.1109/SDEMPED54949.2023.10271492 | |
| dc.identifier.uri | https://search.trdizin.gov.tr/tr/yayin/detay/ | |
| dc.identifier.uri | https://hdl.handle.net/11129/7601 | |
| dc.indekslendigikaynak | Scopus | |
| dc.language.iso | en | |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | |
| dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | |
| dc.rights | info:eu-repo/semantics/closedAccess | |
| dc.snmz | KA_Scopus_20260204 | |
| dc.subject | DC link capacitance | |
| dc.subject | Phase margin | |
| dc.subject | PI controller | |
| dc.subject | Single-phase PFC | |
| dc.subject | THD | |
| dc.title | Influence of DC Link Capacitor Ageing on Performance of Single-Phase Power Factor Correction Rectifiers | |
| dc.type | Conference Object |










