Clock-jitter reduction techniques in continuous time delta-sigma modulators

Abstract

This paper presents a brief overview and comparison of the most popular techniques used for suppressing the effect of clockjitter in continuous-time delta-sigma modulators, including multi-bit, FIR, switched-capacitor, sine, and switched-shaped-current digital to analogue converters. Their principles and design issues are presented followed by a performance comparison which provides inform views on the power consumption issues, speed, ease of realization and effectiveness in jitter suppression of the various techniques.