Clock-jitter reduction techniques in continuous time delta-sigma modulators

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dc.contributor.authorZare-Hoseini, Hashem
dc.contributor.authorKale, Izzet
dc.date.accessioned2026-02-06T18:29:01Z
dc.date.issued2006
dc.departmentDoğu Akdeniz Üniversitesi
dc.descriptionInternational Symposium on VLSI Design, Automation and Test -- APR 26-28, 2006 -- Hsinchu, TAIWAN
dc.description.abstractThis paper presents a brief overview and comparison of the most popular techniques used for suppressing the effect of clockjitter in continuous-time delta-sigma modulators, including multi-bit, FIR, switched-capacitor, sine, and switched-shaped-current digital to analogue converters. Their principles and design issues are presented followed by a performance comparison which provides inform views on the power consumption issues, speed, ease of realization and effectiveness in jitter suppression of the various techniques.
dc.description.sponsorshipInd Technol Res Inst Taiwan,IEEE
dc.identifier.endpage118
dc.identifier.isbn1-4244-0179-8
dc.identifier.scopus2-s2.0-34748892972
dc.identifier.scopusqualityN/A
dc.identifier.startpage117
dc.identifier.urihttps://hdl.handle.net/11129/11238
dc.identifier.wosWOS:000239709500031
dc.identifier.wosqualityN/A
dc.indekslendigikaynakWeb of Science
dc.indekslendigikaynakScopus
dc.language.isoen
dc.publisherIEEE
dc.relation.ispartof2006 International Symposium on Vlsi Design, Automation, and Test (Vlsi-Dat), Proceedings of Technical Papers
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanı
dc.rightsinfo:eu-repo/semantics/closedAccess
dc.snmzKA_WoS_20260204
dc.titleClock-jitter reduction techniques in continuous time delta-sigma modulators
dc.typeConference Object

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